CSC 371
Homework 4

Assigned Oct. 25, due Nov. 13

Problems from Appendix C (sequential circuits)

• Exercises C.39 and C.40 on counter circuits. (Where problem C.40 says "a PLA", just build the thing in LogiSim.)

Problems from Chapter 4 (sequential circuits for processor design)

• Exercises 4.1.4 through 4.1.6 on latencies of functional blocks, which determine the clock cycle time. Use row a numbers.
• Exercises 4.2.4 through 4.2.6 on time/cost tradeoffs. Use row a numbers.
• Exercises 4.5.1 through 4.5.6 on sequential circuits for arithmetic (use row a)
• Exercises 4.12.1 through 4.12.3 on cycle times in pipelined vs. non-pipelined processors (use row a)