CSC 371
Homework 2

Assigned Sept. 11, due Sept. 25

Problems from Chapter 2 (assembly language)

• Exercises 2.3.1 through 2.3.5 on basic arithmetic in MIPS assembler (use row b examples, and don't worry about registers; just pretend you can refer to the variable names as operands in assembly language)
• Exercises 2.10.1 through 2.10.6 on converting between MIPS assembler and MIPS machine language (do both row a and row b)
• Exercise 2.12.1 on changes to the instruction format (do both row a and row b, independently -- that is, describe the effects of making either single change, but not both)
• Exercises 2.18.1 through 2.18.6 on loops and arrays in MIPS assembler (use row b, and assume that D is declared as an array of 4-byte integers)
  Note: The control-flow graphs in the CD supplement to the textbook are all based on assembly code, so I'm not sure what the authors mean by "a control-flow graph for the C code." The solution manual for instructors has something that looks like a flow chart, but that notation doesn't seem to appear anywhere in the textbook. Instead, I suggest doing problem 2.18.1 after problem 2.18.2, using the assembly code you developed in 2.18.2.
  Another note: the row-b code before problem 2.18.4 is slightly incorrect: the last instruction should be not

  bne   $t2, $s0, LOOP
  

  but rather

  bne   $t2, $0, LOOP
  

Problems from Appendix C (logic design)

Use LogiSim to build and test the following circuits, save the circuit to a file, and e-mail me the file. You may want to put each problem in a separate file.

• Exercises C.7-C.8: design and implement a four-input odd-parity circuit (it outputs 1 if an odd number of its inputs are 1, and 0 if an even number of them are 1), using AND, OR, and NOT gates (or bubbled inputs if you prefer). You may use large-fan-in AND and OR gates if you wish (you're not restricted to two-input gates).
• Implement the four-input odd-parity circuit again using two-input XOR gates.
• Exercises C.11-C.12: design and implement four other combinational functions as specified in the book. You may use NOT, AND, OR, and XOR gates, with fan-in as large as you wish, and bubbled inputs and outputs if you wish.
• Exercise C.14: a controlled swapper circuit.